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Instruction set architecture
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521	Beyond Claims of Free Transistors and Abundant Instruction-Level Parallelism Michael D. Smith STANFORD UNIVERSITY Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 22:44:35 Computer engineering Parallel computing Superscalar Central processing unit Reduced instruction set computing Instruction-level parallelism Computing Computer architecture Classes of computers
522	Analysis of Compiled Code: A Prototype Formal Model R.D. Arthan Lemma 1 Ltd. 2nd Floor, 31A Chain Street, Reading UK Add to Reading List Source URL: www.lemma-one.com Language: English - Date: 2008-07-11 10:37:24 Central processing unit Instruction set Microprocessor MIX PDP-8 Computer architecture Computer hardware Electronic engineering
523	sunday August 18, 1996 Kresge Auditorium Sunday Tutorial Schedule 7:30 – 8:30 Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 22:47:32 Classes of computers Instruction set architectures Microprocessors Parallel computing Acorn Computers Reduced instruction set computing X86 Sun Microsystems Very long instruction word Computer architecture Computing Computer hardware
524	The Au1000 Internet Edge Processor: TM A High Performance, Low Power SOC The First Chip in a Family of Parts from Alchemy Semiconductor, Inc. Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 23:37:56 Central processing unit Computer memory Instruction set architectures Microprocessors CPU cache Cache MIPS architecture Microarchitecture Cell Computer architecture Computer hardware Computer engineering
525	emLib Library collection User & Reference Guide Document: UM12001 Add to Reading List Source URL: www.segger.com Language: English - Date: 2014-03-13 06:31:59 Microcontrollers Electronic engineering Segger Microcontroller Systems Instruction set architectures ARM architecture Joint Test Action Group Mbed microcontroller EFM32 STM32 Computer architecture Electronics Embedded systems
526	Microsoft PowerPoint - ARMbasics4 Add to Reading List Source URL: www.ee.ic.ac.uk Language: English - Date: 2001-10-18 10:48:50 Instruction set architectures Central processing unit Classes of computers Assembly languages Instruction set Addressing mode ARM architecture Processor register Reduced instruction set computing Computer architecture Computing Computer engineering
527	SH-5: A First 64-bit SuperH Core with Multimedia Extension Fumio Arakawa Hitachi, Ltd. Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 23:39:01 Computer engineering Microcontrollers SuperH CPU cache Computer architecture Computer hardware Instruction set architectures
528	The Alpha[removed]Microprocessor: Out-of-Order Execution at 600 Mhz R. E. Kessler COMPAQ Computer Corporation Shrewsbury, MA Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 22:48:29 Central processing unit CPU cache Cache Computer memory Instruction set architectures Alpha 21264 Branch predictor Out-of-order execution DEC Alpha Computer architecture Computer hardware Computer engineering
529	SYSTEM V APPLICATION BINARY INTERFACE MIPS RISC Processor Supplement 3rd Edition Add to Reading List Source URL: uclibc.org Language: English System V Unix MIPS Technologies Instruction set architectures MIPS architecture Application binary interface UnixWare Santa Cruz Operation Reduced instruction set computing Computer architecture Computing System software
530	____________________________________________________________________ DUAL-USE LIST - CATEGORY 4 - COMPUTERS ____________________________________________________________________ _________________________________________ Add to Reading List Source URL: www.wassenaar.org Language: English - Date: 2015-03-25 12:20:54 Adjusted Peak Performance Digital signal processing 64-bit FLOPS Central processing unit Computer Instruction set Parallel computing Digital signal processor Computer architecture Computing Electronics

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